| Name of the Candidate Mr. Vulavakayala Siva (Roll No. 19081005) | |
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Exam Type Ph.D. Oral Examination (Final Viva-voce)
Exam Date & Time
08-Aug-24 16:00 PM | |
| Topic SVM Techniques for Common Mode Voltage Minimization in High Gain Ultra Sparse Matrix Converters | |
| Message The Ph.D. Oral Examination of Mr. Vulavakayala Siva [Roll no. 19081005], Research Scholar, Department of Electrical Engineering, IIT (BHU) will be held as per the following details:
Date: August 8, 2024 (Thursday) Time: 04:00 PM Venue: Committee Room (Ground Floor), Department of Electrical Engineering Title of the PhD Thesis: SVM Techniques for Common Mode Voltage Minimization in High Gain Ultra Sparse Matrix Converters All the members of the Ph.D. Oral Board, DPGC, interested Faculty members and students are invited to attend the same.
Prof. Santosh K Singh (PhD Supervisor) Department of Electrical Engineering Indian Institute of Technology (BHU) Varanasi | |
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Name of the SupervisorProf. Santosh K Singh (supervisor)
Designation Professor (Electrical Engineering)
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| Mode of Exam offline Venue / Url : Committee Room (Ground Floor), Department of Electrical Engineering | |
| Uploaded date 07-Aug-24 | |