Details (Academic Broadcast)

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Ref.No : IIT(BHU)/ACAD/10602
Old Reference Number: 'N/A'
Name of the Candidate Mr. Naragoni Saidulu (Roll No. 22091003)
Exam Type Ph.D. pre-thesis submission seminar
Exam Date & Time 11-Jun-26 11:00 AM
Topic
Structure-Aware Hybrid Deep Neural Architectures
Message

Dear all,

The pre-PhD thesis presentation of Mr. Naragoni Saidulu (Roll No. 22091003), JDP Research Scholar of the Department of Electronics Engineering, IIT (BHU) Varanasi, will be held in the Department as per the following schedule:


Date: 11.06.2026 (Thursday)

Time: 11:00 AM

Venue: Committee Room, Department of Electronics Engineering


Title of the Thesis: Structure-Aware Hybrid Deep Neural Architectures
for Low-Dose CT Image Denoising

Supervisor: Dr. P.R. Muduli (IIT BHU)

Joint Supervisor: Dr. Anirban Dasgupta (IIT Guwahati)


All JDC and DPGC members, faculty members, and research scholars of the department are requested to attend the seminar. Interested faculty members and research scholars from other departments of the Institute are also cordially invited to attend the seminar.

As a joint supervisor, Dr. Anirban Dasgupta (IIT Guwahati) will join the meeting online, in accordance with the JDP ordinance.

Online Meeting link: https://meet.google.com/aki-gdhh-ufg


Thanks and regards,

Dr. P.R. Muduli

Name of the SupervisorDr. P.R. Muduli (supervisor)
Designation Assistant Professor (Electronics Engineering)
Mode of Exam offline Venue / Url : Committee Room of the Dept. of Electronics Engineering, IIT (BHU), Varanasi.
Uploaded date 28-May-26
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