| Name of the Candidate Mr. Jagadish (Roll No. 19091501) | |
|
Exam Type Ph.D. pre-thesis submission
Exam Date & Time
12-Aug-24 16:00 PM | |
| Topic Device modeling and logic circuits design for spin-based computing | |
| Message Notice It is hereby informed that Mr. Jagadish (Roll number: 19091501), my Ph.D. research scholar of the Department of Electronics Engineering, will deliver his Ph.D. Pre-submission seminar (
Topic of the Thesis/Seminar: "Device modeling and logic circuits design for spin-based computing"
Date & Time of Seminar: 12th August 2024 (Monday), 4pm onwards
Venue: Seminar/Committee Room, Department of Electronics Engineering.
All the interested faculty members, as well as interested research scholars are invited to attend the seminar.
Thank you. Regards
Dr. Shivam Verma (PhD. Supervisor) Department of Electronics Engg. | |
|
Name of the SupervisorDr. Shivam Verma (supervisor)
Designation Assistant Professor (Electronics Engineering)
| |
| Mode of Exam offline Venue / Url : Seminar/Committee Room, Department of Electronics Engineering | |
| Uploaded date 05-Aug-24 | |