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Ref.No : IIT(BHU)/ACAD/10198
Old Reference Number: 'N/A'
Name of the Candidate Mr. Jagadish (Roll No. 19091501)
Exam Type Ph.D. Oral Examination (Final Viva-voce)
Exam Date & Time 07-Jan-25 12:00 PM
Topic
Device modeling and logic circuits design for spin-based computing
Message
The Ph.D. Oral Examination (Final Viva-Voce) of Mr. Jagadish, Ph.D. research scholar (Roll no. 19091501), Department of Electronics Engineering, Indian Institute of Technology (Banaras Hindu University), will be held as per the following schedule:

Title of the thesis: “Device modeling and logic circuits design for spin-based computing
Date: 07.01.2025 (Tuesday)
Time: 12:00 Noon 
Mode: Hybrid

Venue: Committee Room, Dept. of Electronics Engineering, IIT (BHU), Varanasi 

Interested faculty members and research scholars are invited to attend the same physically in the Committee Room of the Dept. of Electronics Engineering, IIT (BHU), Varanasi.


With Best Regards!

Dr. Shivam Verma

Assistant Professor,
Department of Electronics Engineering,
Indian Institute of Technology (BHU) Varanasi,
Varanasi, Uttar Pradesh, INDIA - 221005 
Name of the SupervisorDr. Shivam Verma (supervisor)
Designation Assistant Professor (Electronics Engineering)
Mode of Exam offline Venue / Url : Committee Room of the Dept. of Electronics Engineering, IIT (BHU), Varanasi.
Uploaded date 06-Jan-25